MC68HC11KW1 Datasheet, PDF (57/238 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor HCMOS) microcontroller unit

NOSEC — EEPROM security disabled (refer to Section 4.6.3)
1 (set) – Disable security.
0 (clear) – Enable security.
NOCOP — COP system disable (refer to Section 5)
1 (set) – COP system disabled.
0 (clear) – COP system enabled (forces reset on timeout).
4
EEON — EEPROM enable
1 (set) – EEPROM included in the memory map.
0 (clear) – EEPROM is excluded from the memory map.
4.3.2.2 INIT — RAM and I/O mapping register
RAM & I/O mapping (INIT)
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
$003D RAM3 RAM2 RAM1 RAM0 REG3 REG2 REG1 REG0 0000 0000
The internal registers used to control the operation of the MCU can be relocated on 4K boundaries
within the memory space with the use of INIT. This 8-bit special-purpose register can change the
default locations of the RAM and control registers within the MCU memory map. It can be written
to only once within the first 64 E clock cycles after a reset. It then becomes a read-only register.
RAM[3:0] — RAM map position
These four bits, which specify the upper hexadecimal digit of the RAM address, control the
position of the RAM in the memory map. The RAM can be positioned at the beginning of any 4K
page in the memory map. Refer to Table 4-5.
REG[3:0] — 160-byte register block position
These four bits specify the upper hexadecimal digit of the address for the 160-byte block of internal
registers. The register block is positioned at the beginning of any 4K page in the memory map.
Refer to Table 4-5.
MC68HC11KW1
OPERATING MODES AND ON-CHIP MEMORY
4-13