MC68HC11KW1 Datasheet, PDF (125/238 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor HCMOS) microcontroller unit

6.11
Internal pull-up resistors
Four of the ports (B, F, G and H) have internal, software selectable pull-up resistors under control
of the port pull-up assignment register (PPAR).
6.11.1 PPAR — Port pull-up assignment register
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
Port pull-up assignment (PPAR) $002C 0
0
0
0 HPPUE GPPUE FPPUE BPPUE 0000 1111
Bits [7:4] — Not implemented; always read zero.
xPPUE — Port x pin pull-up enable
These bits control the on-chip pull-up devices connected to all the pins on I/O ports B, F, H and
6
PG[5:0]. They are collectively enabled or disabled via the PAREN bit in the CONFIG register (see
Section 6.12.2).
1 (set) – Port x pin on-chip pull-up devices enabled.
0 (clear) – Port x pin on-chip pull-up devices disabled.
Note:
FPPUE and BPPUE have no effect in expanded mode since ports F and B are then
dedicated address bus outputs.
Note:
HPPUE and GPPUE are set on reset, to insure that all expanded memory address
signals and chip select signals will be pulled to a logic high level (since the pins are
configured for general I/O and set as high impedance inputs).
Note:
The pull-up resistors are disabled when the PAREN bit in the CONFIG register is equal
to ‘0’. The approximate value of these resistors is 14–17Kohms.
MC68HC11KW1
PARALLEL INPUT/OUTPUT
6-13