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MC68HC11KW1 Datasheet, PDF (101/238 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor HCMOS) microcontroller unit | |||
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SMOD â Special mode select (refer to Section 4)
1 (set) â Special mode variation in effect.
0 (clear) â Normal mode variation in effect.
MDA â Mode select A (refer to Section 4)
1 (set) â Normal expanded or special test mode in effect.
0 (clear) â Normal single chip or special bootstrap mode in effect.
PSEL[4:0] â Priority select bits
These bits select one interrupt source to be elevated above all other I-bit-related sources and can
be written to only while the I-bit in the CCR is set (interrupts disabled). See Table 5-3.
5
Table 5-3 Highest priority interrupt selection
PSELx
43210
Interrupt source promoted
0 0 0 X X Reserved (default to IRQ)
0 0 1 0 0 Reserved (default to IRQ)
0 0 1 0 1 Reserved (default to IRQ)
0 0 1 1 0 IRQ (external pin)
0 0 1 1 1 Real-time interrupt
0 1 0 0 0 Timer 1 input capture 1
0 1 0 0 1 Timer 1 input capture 2
0 1 0 1 0 Timer 1 input capture 3
0 1 0 1 1 Timer 1 output compare 1
0 1 1 0 0 Timer 1 output compare 2
0 1 1 0 1 Timer 1 output compare 3
0 1 1 1 0 Timer 1 output compare 4
0 1 1 1 1 Timer 1 output compare 5/input capture 4
1 0 1 0 1 Timer 2 output compare 1, 2, 3
1 0 1 1 0 Timer 2 input capture1/output compare 4
1 0 0 0 0 Timer 1 overï¬ow
1 0 1 1 1 Timer 2 overï¬ow
1 0 0 0 1 Pulse accumulator overï¬ow
1 0 0 1 0 Pulse accumulator input edge
1 1 0 0 0 Timer 3 input capture/output compare
1 1 0 0 1 Timer 3 overï¬ow
1 0 0 1 1 SPI serial transfer complete
1 0 1 0 0 SCI serial system
1 1 0 1 X Reserved (default to IRQ)
1 1 1 X X Reserved (default to IRQ)
MC68HC11KW1
RESETS AND INTERRUPTS
5-11
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