MC68HC11KW1 Datasheet, PDF (162/238 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor HCMOS) microcontroller unit

FOC[1:5] — Force output compares
1 (set) – A forced output compare action will occur on the specified pin.
0 (clear) – No action.
Bits [2:0] — Not implemented; always read zero
9.1.3.3 OC1M — Output compare 1 mask register
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
Output compare 1 mask (OC1M) $000C OC1M7 OC1M6 OC1M5 OC1M4 OC1M3 0
0
0 0000 0000
Use OC1M with OC1 to specify the bits of port A that are affected by a successful OC1 compare.
The bits of the OC1M register correspond to PA7–PA3.
OC1M[7:3] — Output compare masks for OC1
1 (set) – OC1 is configured to control the corresponding pin of port A.
0 (clear) – OC1 will not affect the corresponding port A pin.
Bits [2:0] — Not implemented; always read zero.
9.1.3.4 OC1D — Output compare 1 data register
9
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
Output compare 1 data (OC1D) $000D OC1D7 OC1D6 OC1D5 OC1D4 OC1D3 0
0
0 0000 0000
Use this register with OC1 to specify the data that is to be written to the affected pin of port A after
a successful OC1 compare. When a successful OC1 compare occurs, a data bit in OC1D is written
to the corresponding pin of port A for each bit that is set in OC1M.
OC1D[7:3] — Output compare data for OC1
If OC1Mx is set, data in OC1Dx is output to port A pin x on successful OC1 compares.
Bits [2:0] — Not implemented; always read zero
9-10
TIMING SYSTEM
MC68HC11KW1