MC68HC11KW1 Datasheet, PDF (173/238 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor HCMOS) microcontroller unit

9.2.8 TCTL4 — Timer control register 4 (Timer 2)
Timer control register 4 (TCTL4)
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
$0081 EDGB EDGA PR2B PR2A ECEB ECEA T2STP I1/04 0000 0000
EDGB and EDGA — Input capture edge control
This pair of bits configures the input capture edge detector circuits for IC1. IC1 functions only if
the I1/O4 bit is set.
EDGB
0
0
1
1
EDGA
Configuration
0 IC1 disabled
1 IC1 captures on rising edges only
0 IC1 captures on falling edges only
1 IC1 captures on any edge
Note:
The maximum frequency of the input clock must be less than E/2 when counting on one
edge, and less that E/4 when counting on both edges.
PR2A and PR2B — Timer 2 prescaler select
These bits are used to select the prescaler divide-by ratio for Timer 2. They can only be written to
once after reset.
9
PR2B
0
0
1
1
PR2A
0
1
0
1
Prescaler
1
4
8
16
ECEB and ECEA — Event counter edge control
These control bits configure the input clock source for the Timer 2 counter. They can be written to
only once after reset.
ECEB
0
0
1
1
ECEA
0
1
0
1
Configuration
Timer 2 uses internal clock and prescaler
Count on rising edges of external clock only
Count on falling edges of external clock only
Count on any edge of external clock
MC68HC11KW1
TIMING SYSTEM
9-21