MC68HC11KW1 Datasheet, PDF (74/238 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor HCMOS) microcontroller unit

4.4.5 MMWBR – Memory mapping window base register
Memory mapping window base
(MMSIZ)
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
$0057 W2A15 W2A14 W2A13 0 W1A15 W1A14 W1A13 0 0000 0000
The MMWBR register defines the starting address of each of the two windows within the CPU
4
64K byte address range. The windows normally begin at a boundary related to their size (an
8K byte window can begin on any 8K byte boundary, beginning at $0000).
W2A[15:13] — Window 2 base address
These bits select the three most significant bits (MSB) of the base address for memory mapping
window 2. Note that W2A13 is ignored if the bank size is set for 16 or 32K bytes. Refer to
Figure 4-11.
Bits 4 and 0 — Not implemented; always read zero.
W1A[15:13] — Window base 1 address
These bits select the three MSBs of the base address for memory mapping window 1. Note that
W1A13 is ignored if the bank size is set for 16 or 32K bytes. Refer to Table 4-11.
Table 4-11 Memory expansion window base address
MSB bits
WxA[15:13]
000
001
010
011
100
101
110
111
Window base address
8K bytes 16K bytes 32K bytes
$0000 $0000 $0000
$2000 $0000 $0000
$4000 $4000 $4000
$6000 $4000 $4000
$8000 $8000 $8000
$A000 $8000 $8000
$C000 $C000 $8000
$E000 $C000 $8000
4-30
OPERATING MODES AND ON-CHIP MEMORY
MC68HC11KW1