MC68HC11KW1 Datasheet, PDF (24/238 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor HCMOS) microcontroller unit

2.3
VDD and VSS
2
Power is supplied to the microcontroller via these pins. VDD is the positive supply and VSS is
ground. The MCU operates from a 5V (nominal) power supply.
It is in the nature of CMOS designs that very fast signal transitions occur on the MCU pins.These short
rise and fall times place very high short-duration current demands on the power supply. To prevent
noise problems, special care must be taken to provide good power supply bypassing at the MCU.
Bypass capacitors should have good high-frequency characteristics and be as close to the MCU as
possible. Bypassing requirements vary, depending on how heavily the MCU pins are loaded.
The MC68HC11KW1 has four VDD pins and four VSS pins. One pair of these pins is reserved for
supplying power to the analog-to-digital converter (VDDAD, VSSAD); the remaining pins are used
for the internal logic, and to supply power to the port logic on either half of the chip.
2.4
E clock output (E)
E is the output connection for the internally generated E clock. The signal from E is used as a
timing reference. The frequency of the E clock output is one quarter that of the input frequency at
the XTAL and EXTAL pins. When E clock output is low, an internal process is taking place; when
it is high, data is being accessed. All clocks, including the E clock, are halted when the MCU is in
STOP mode. The E clock output can be turned off in single-chip modes to reduce the effects of
RFI (see Section 4.3.2.5).
2.5
XOUT
The XOUT pin outputs the buffered CLKX signal, if enabled by the XCLK bit in the CONFIG
register. The frequency of CLKX can be selected using two bits in the OPT2 register (XDV1 and
XDV2). On reset, CLKX has the same frequency as EXTAL (4E). See Section 4.
Note that the phase relationship between CLKX and EXTAL cannot be predicted.
2.6
Interrupt request (IRQ)
The IRQ input provides a means of applying asynchronous interrupt requests to the MCU. Either
falling-edge-sensitive triggering or level-sensitive triggering is program selectable (OPTION
register). IRQ is always configured to level-sensitive-triggering at reset.
Note:
Connect an external pull-up resistor, typically 4.7 kΩ, to VDD when IRQ is used in a
level sensitive wired-OR configuration. See also Section 2.7.
PIN DESCRIPTIONS
MC68HC11KW1
2-4