MC68HC11KW1 Datasheet, PDF (28/238 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor HCMOS) microcontroller unit

2.11.2 Port B
2
Port B is an 8-bit, general-purpose I/O port with a data register (PORTB) and a data direction
register (DDRB). In single chip mode, port B pins are general purpose I/O pins (PB[7:0]). In
expanded mode, port B pins act as the high-order address lines (ADDR[15:8]) of the address bus.
PORTB can be read at any time and always returns the pin level. If PORTB is written, the data is
stored in internal latches. The pins are driven only if they are configured as outputs in single chip
or bootstrap mode. For further information, refer to Section 6.
Port B pins include on-chip pull-up devices which can be enabled or disabled via the port pull-up
assignment register (PPAR).
2.11.3 Port C
Port C is an 8-bit, general-purpose I/O port with a data register (PORTC) and a data direction
register (DDRC). In single chip mode, port C pins are general purpose I/O pins (PC[7:0]). In the
expanded mode, port C pins are configured as data bus pins (DATA[7:0]).
PORTC can be read at any time; inputs return the pin level and outputs return the pin driver input
level. If PORTC is written, the data is stored in internal latches. The pins are driven only if they are
configured as outputs in single chip or bootstrap mode. Port C pins are general purpose inputs out
of reset in single chip and bootstrap modes. In expanded and test modes, these pins are data bus
lines out of reset.
The CWOM control bit in the OPT2 register disables port C’s p-channel output drivers. Because
the n-channel driver is not affected by CWOM, setting CWOM causes port C to become an
open-drain-type output port suitable for wired-OR operation. In wired-OR mode (PORTC bits at
logic level zero), the pins are actively driven low by the n-channel driver. When a port C bit is at
logic level one, the associated pin is in a high impedance state as neither the n-channel nor the
p-channel devices are active. It is customary to have an external pull-up resistor on lines that are
driven by open-drain devices. Port C can only be configured for wired-OR operation when the
MCU is in single chip mode. For further information, refer to Section 6.
2.11.4 Port D
Port D, an 8-bit, general-purpose I/O port, has a data register (PORTD) and a data direction
register (DDRD). All the port D pins can be used for general purpose I/O, and pins [5:0] can also
be used for the serial peripheral interface (SPI, pins [5:2]) and the serial communications interface
(SCI, pins [1,0]).
PORTD can be read at any time; inputs return the pin level and outputs return the pin driver input
level. If PORTD is written, the data is stored in internal latches. The pins are driven only if port D
is configured for general purpose output.
PIN DESCRIPTIONS
MC68HC11KW1
2-8