MC68HC11KW1 Datasheet, PDF (6/238 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor HCMOS) microcontroller unit

Paragraph
Number
TITLE
3
CENTRAL PROCESSING UNIT
Page
Number
3.1 Registers ...............................................................................................................3-1
3.1.1 Accumulators A, B and D.................................................................................3-2
3.1.2 Index register X (IX) .........................................................................................3-2
3.1.3 Index register Y (IY) .........................................................................................3-2
3.1.4 Stack pointer (SP)............................................................................................3-2
3.1.5 Program counter (PC)......................................................................................3-4
3.1.6 Condition code register (CCR).........................................................................3-4
3.1.6.1
Carry/borrow (C) ........................................................................................3-5
3.1.6.2
Overflow (V) ...............................................................................................3-5
3.1.6.3
Zero (Z) ......................................................................................................3-5
3.1.6.4
Negative (N) ...............................................................................................3-5
3.1.6.5
Interrupt mask (I)........................................................................................3-5
3.1.6.6
Half carry (H)..............................................................................................3-6
3.1.6.7
X interrupt mask (X) ...................................................................................3-6
3.1.6.8
Stop disable (S)..........................................................................................3-6
3.2 Data types .............................................................................................................3-6
3.3 Opcodes and operands .........................................................................................3-7
3.4 Addressing modes.................................................................................................3-7
3.5 Immediate (IMM) ...................................................................................................3-7
3.5.1 Direct (DIR)......................................................................................................3-7
3.5.2 Extended (EXT) ...............................................................................................3-8
3.5.3 Indexed (IND, X; IND, Y)...................................................................................3-8
3.5.4 Inherent (INH) ..................................................................................................3-8
3.5.5 Relative (REL)..................................................................................................3-8
3.6 Instruction set ........................................................................................................3-8
4
OPERATING MODES AND ON-CHIP MEMORY
4.1 Operating modes ...................................................................................................4-1
4.1.1 Single chip operating mode .............................................................................4-1
4.1.2 Expanded operating mode...............................................................................4-1
4.1.3 Special test mode ............................................................................................4-2
4.1.4 Special bootstrap mode ...................................................................................4-2
4.2 On-chip memory....................................................................................................4-3
4.2.1 Mapping allocations .........................................................................................4-3
4.2.1.1
RAM ...........................................................................................................4-4
4.2.1.2
Bootloader ROM ........................................................................................4-4
4.2.2 Registers..........................................................................................................4-4
4.3 System initialization ...............................................................................................4-10
4.3.1 Mode selection.................................................................................................4-10
4.3.1.1
HPRIO — Highest priority I-bit interrupt & misc. register ...........................4-11
TABLE OF CONTENTS
MC68HC11KW1
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