MC68HC11KW1 Datasheet, PDF (48/238 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor HCMOS) microcontroller unit

In special bootstrap mode, a bootloader ROM is enabled at locations $BE40–$BFFF. The vectors
for special bootstrap mode are contained in the bootloader program.
4.2.1.1 RAM
The MC68HC11KW1 has 768 bytes of fully static RAM that are used for storing instructions,
variables and temporary data during program execution. RAM can be placed at any 4K boundary
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in the 64K byte address space by writing an appropriate value to the INIT register.
By default, RAM is initially located at $00A0 in the memory map. Direct addressing mode can
access the first 96 locations of RAM using a one-byte address operand. Direct mode accesses
save program memory space and execution time. Registers can be moved to other boundaries to
allow 256 bytes of RAM to be located in direct addressing space. See Figure 4-2.
The on-chip RAM is a fully static memory. RAM contents can be preserved during periods of
processor inactivity by either of two methods, both of which reduce power consumption:
1) During the software-based STOP mode, MCU clocks are stopped, but the
MCU continues to draw power from V_DD. Power supply current is directly
related to operating frequency in CMOS integrated circuits and there is very
little leakage when the clocks are stopped. These two factors reduce power
consumption while the MCU is in STOP mode.
2) To reduce power consumption to a minimum, V_DD can be turned off, and the
MODB/VSTBY pin can be used to supply RAM power from either a battery
back-up or a second power supply. Although this method requires external
hardware, it is very effective. Refer to Section 2 for information about how to
connect the stand-by RAM power supply and to Section 5 for a description
of low power operation.
4.2.1.2 Bootloader ROM
The bootloader ROM is enabled at address $BE40–$BFFF during special bootstrap mode. The
reset vector is fetched from this ROM and the MCU executes the bootloader firmware. In normal
modes, the bootloader ROM is disabled.
4.2.2 Registers
In Table 4-2, a summary of registers and control bits, the registers are shown in ascending order
within the 160-byte register block. The addresses shown are for default block mapping
($0000–$009F), however the INIT register remaps the block to any 4K page ($x000–$x09F). See
Section 4.3.2.2.
OPERATING MODES AND ON-CHIP MEMORY
MC68HC11KW1
4-4