MC68HC11KW1 Datasheet, PDF (134/238 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor HCMOS) microcontroller unit

7.6.1 SCBDH, SCBDL — SCI baud rate control registers
SCI baud rate high (SCBDH)
SCI baud rate low (SCBDL)
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
$0070 BTST BSPL SYNC SBR12 SBR11 SBR10 SBR9 SBR8 0000 0000
$0071 SBR7 SBR6 SBR5 SBR4 SBR3 SBR2 SBR1 SBR0 0000 0100
The contents of this register determine the baud rate of the SCI.
BTST — Baud register test (Test mode only)
BSPL — Baud rate counter split (Test mode only)
SYNC — Baud rate counter reset and sync (Test mode only)
SBR[12:0] — SCI baud rate selects
Use the following formula to calculate SCI baud rate. Refer to the table of baud rate control values
7
for example rates:
SCI baud rate = _{1----6-E----×}-X----₍^{T--2--A--B---L-R-----}₎
where the baud rate control value (BR) is the contents of SCBDH/L (BR = 1, 2, 3,... 8191).
For example, to obtain a baud rate of 1200 with an EXTAL frequency of 16 MHz, the baud register
(SCBDH/L) should contain $01A0 (see Table 7-1).
The clock rate generator is disabled if BR = 0, or if neither the receiver nor transmitter is enabled
(both RE and TE in SCCR2 are cleared).
Writes to the baud rate registers will only be successful if the last (or only) byte written is SCBDL.
The use of an STD instruction is recommended as it guarantees that the bytes are written in the
correct order.
SERIAL COMMUNICATIONS INTERFACE
MC68HC11KW1
7-6