MC68HC11KW1 Datasheet, PDF (107/238 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor HCMOS) microcontroller unit

Power-on reset
(POR)
Highest
External
reset
Delay
(4064 cycles)
Priority
Clock monitor fail
(CME = 1)
Lowest
COP watchdog
timeout
(NOCOP = 0)
Load program counter
with contents of
$FFFE, $FFFF
(vector fetch)
Load program counter
Load program counter
5
with contents of
with contents of
$FFFC, $FFFD
$FFFA, $FFFB
(vector fetch)
(vector fetch)
Set S, X, and I bits
in CCR.
Reset MCU hardware
1A
Begin an instruction
sequence
Yes
X-bit in
CCR set?
No
XIRQ pin
low?
No
1B
Stack CPU registers.
Yes
Set X and I bits.
Fetch vector at
$FFF4, $FFF5
Figure 5-1 Processing flow out of reset (1 of 2)
MC68HC11KW1
RESETS AND INTERRUPTS
5-17