MC68HC11KW1 Datasheet, PDF (186/238 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor HCMOS) microcontroller unit

while the external PAI pin is activated. Refer to Table 9-3. The pulse accumulator counter can be
read or written at any time.
Table 9-3 Pulse accumulator timing
Crystal
frequency
E clock
Cycle time
64/E
16.0 MHz 4.0 MHz 250 ns 16.0 µs
PACNT
overflow
4.096 ms
E /64 clock
(from main timer)
9
PA7/
OC1/
PAI
&
Input buffer
and edge detector
Output buffer
TOF
RTIF
PAOVF
PAIF
0
0
0
0
TOI
RTII
PAOVI
PAII
0
0
PR1
PR0
Overf low
2:1 Clock
MUX
PACNT
Enable
&1
Interrupt
requests
&2
From
OC1
From
DDRA7
PACTL
Internal data bus
Figure 9-5 Pulse accumulator block diagram
Pulse accumulator control bits are also located within two timer registers, TMSK2 and TFLG2, as
described in the following paragraphs.
9-34
TIMING SYSTEM
MC68HC11KW1