SH7101 Datasheet, PDF (468/486 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

19. Electrical Characteristics
19.3.7 Serial Communication Interface (SCI) Timing
Table 19.9 shows serial communication interface timing.
Table 19.9 Serial Communication Interface Timing
Conditions: V_CC = 4.0 V to 5.5 V, AV_CC = 4.0 V to 5.5 V, V_SS = PLLV_SS = AV_SS = 0 V, T_a = –20°C
to +75°C (Standard product)*, T_a = –40°C to +85°C (Wide temperature-range
product)*
Item
Symbol Min
Max
Unit
Figures
Input clock cycle
t_scyc
4
⎯
t_pcyc
Figure 19.13
Input clock cycle (clock sync) t_scyc
6
⎯
t_pcyc
Input clock pulse width
t
0.4
0.6
t
sckw
scyc
Input clock rise time
t_sckr
⎯
1.5
t_pcyc
Input clock fall time
t_sckf
⎯
1.5
t_pcyc
Transmit data delay time
t_TxD
⎯
100
ns
Figure 19.14
Received data setup time
t_RxS
100
⎯
ns
Received data hold time
t_RxH
100
⎯
ns
[Operating precautions]
The inputs and outputs are asynchronous in asynchronous mode, but as shown in figure
19.14, the received data is considered to have been changed at CK clock rise (two-clock
intervals). The transmit signals change with a reference of CK clock rise (two-clock
intervals).
Note: * See page 2 for correspondence of the standard product, wide temperature-range
product, and product model name.
SCK2, SCK3
t_sckw
V_IH
V_IH
V_IL
t_sckr
V_IH
V_IL
t_scyc
Figure 19.13 Input Clock Timing
t_sckf
V_IH
V_IL
Rev.2.00 Sep. 27, 2007 Page 434 of 448
REJ09B0394-0200