SH7101 Datasheet, PDF (159/486 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

8. Multi-Function Timer Pulse Unit (MTU)
Initial
Bit Bit Name value
3
TGFD
0
2
TGFC
0
R/W
R/(W)
R/(W)
Description
Input Capture/Output Compare Flag D
Status flag that indicates the occurrence of TGRD input
capture or compare match in channels 0, 3, and 4. Only
0 can be written, for flag clearing. In channels 1 and 2, bit
3 is reserved. It is always read as 0, and the write value
should always be 0.
[Setting conditions]
• When TCNT = TGRD and TGRD is functioning as
output compare register
• When TCNT value is transferred to TGRD by input
capture signal and TGRD is functioning as input
capture register
[Clearing condition]
• When 0 is written to TGFD after reading TGFD = 1
Input Capture/Output Compare Flag C
Status flag that indicates the occurrence of TGRC input
capture or compare match in channels 0, 3, and 4. Only
0 can be written, for flag clearing. In channels 1 and 2, bit
2 is reserved. It is always read as 0, and the write value
should always be 0.
[Setting conditions]
• When TCNT = TGRC and TGRC is functioning as
output compare register
• When TCNT value is transferred to TGRC by input
capture signal and TGRC is functioning as input
capture register
[Clearing condition]
• When 0 is written to TGFC after reading TGFC = 1
Rev.2.00 Sep. 27, 2007 Page 125 of 448
REJ09B0394-0200