SH7101 Datasheet, PDF (170/486 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

8. Multi-Function Timer Pulse Unit (MTU)
8.3.17 Bus Master Interface
The timer counters (TCNT), general registers (TGR), timer subcounter (TCNTS), timer period
buffer register (TCBR), and timer dead time data register (TDDR), and timer period data register
(TCDR) are 16-bit registers. A 16-bit data bus to the bus master enables 16-bit read/writes. 8-bit
read/write is not possible. Always access in 16-bit units.
All registers other than the above registers are 8-bit registers. These are connected to the CPU by
a 16-bit data bus, so 16-bit read/writes and 8-bit read/writes are both possible.
Rev.2.00 Sep. 27, 2007 Page 136 of 448
REJ09B0394-0200