SH7101 Datasheet, PDF (422/486 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

17. Power-Down Modes
Table 17.1 Internal Operation States in Each Mode
Function
Normal
operation
Sleep
Module Standby Software Standby
System clock pulse generator
Functioning
Functioning
Functioning
Halted
CPU
Instructions
Functioning
Halted (retained) Functioning
Halted (retained)
Registers
External
interrupts
NMI
IRQ3 to IRQ0
Functioning
Functioning
Functioning
Functioning
Peripheral
functions
I/O port
WDT
Functioning
Functioning
Functioning
Functioning
Functioning
Functioning
Retained
Halted (retained)
SCI
Functioning
Functioning
Halted (reset)
Halted (reset)
A/D
MTU
CMT
ROM
RAM
Functioning
Functioning
Retained
Retained
Notes: 1. "Halted (retained)" means that the operation of the internal state is suspended, although
internal register values are retained.
2. "Halted (reset)" means that internal register values and internal state are initialized.
3. In module standby mode, only modules for which a stop setting has been made are
halted (reset or retained).
4. There are two types of on-chip peripheral module registers; ones which are initialized in
software standby mode and module standby mode, and those not initialized those
modes. For details, refer to section 18.3, Register States in Each Operating Mode.
5. The port high-impedance bit (HIZ) in SBYCR sets the state of the I/O port in software
standby mode. For details on the setting, refer to section 17.2.1, Standby Control
Register (SBYCR). For the state of pins, refer to appendix A, Pin States.
Rev.2.00 Sep. 27, 2007 Page 388 of 448
REJ09B0394-0200