SH7101 Datasheet, PDF (122/486 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

7. Bus State Controller (BSC)
7.4 Address Map
Table 7.1 shows the address map.
Table 7.1 Address Map
On-chip ROM enabled mode
Address
Space
Memory
Size
Bus Width
H'0000 0000 to H'0000 7FFF On-chip ROM
On-chip ROM
32 kbytes
32 bits
H'0000 8000 to H'0001 FFFF
Reserved
32 bits
H'0002 0000 to H'0003 FFFF
Reserved
32 bits
H'0004 0000 to H'FFFF 7FFF Reserved
Reserved
Reserved
H'FFFF 8000 to H'FFFF BFFF On-chip peripheral On-chip peripheral 16 kbytes
module
module
8, 16 bits
H'FFFF C000 to H'FFFF CFFF Reserved
Reserved
H'FFFF D000 to H'FFFF DFFF On-chip RAM
On-chip RAM
Reserved
32 bits
H'FFFF E000 to H'FFFF F7FF
Reserved
32 bits
H'FFFF F800 to H'FFFF FFFF
2 kbytes
32 bits
Note: Reserved area should not be accessed, or operation cannot be guaranteed.
Rev.2.00 Sep. 27, 2007 Page 88 of 448
REJ09B0394-0200