SH7101 Datasheet, PDF (310/486 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

9. Watchdog Timer
9.6.5 System Reset by WDTOVF Signal
If a WDTOVF output signal is input to the RES pin, the chip cannot initialize correctly.
Avoid logical input of the WDTOVF signal to the RES input pin. To reset the entire system with
the WDTOVF signal, use the circuit shown in figure 9.9.
Reset input
SH7101
RES
Reset signal to entire system
WDTOVF
Figure 9.9 Example of System Reset Circuit Using WDTOVF Signal
9.6.6 Internal Reset in Watchdog Timer Mode
If the RSTE bit is cleared to 0 in watchdog timer mode, the chip will not be reset internally when a
TCNT overflow occurs, but TCNT and TCSR in the WDT will be reset.
9.6.7 Manual Reset in Watchdog Timer Mode
When an internal reset is effected by TCNT overflow in watchdog timer mode, the processor waits
until the end of the bus cycle at the time of manual reset generation before making the transition to
manual reset exception processing.
9.6.8 Notes on Using WDTOVF pin
The WDTOVF pin should not be pulled down. However, if it is necessary to pull this pin down, a
resistance of 1 MΩ or higher should be used.
Rev.2.00 Sep. 27, 2007 Page 276 of 448
REJ09B0394-0200