SH7101 Datasheet, PDF (439/486 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

18. List of Registers
Register Name
Port B I/O register
⎯
Port B control register 1
Port B control register 2
⎯
Port E data register L
Port F data register
Port E I/O register L
Port E I/O register H
Port E control register L1
Port E control register L2
Port E control register H
Port E data register H
Input control/status register 1
Output control/status register
Abbreviation Bits Address
Module
PBIOR
16 H'FFFF8394 PFC
⎯
⎯ H'FFFF8396 to ⎯
H'FFFF8397
PBCR1
16 H'FFFF8398 PFC
PBCR2
16 H'FFFF839A
⎯
⎯ H'FFFF839C to ⎯
H'FFFF83AE
PEDRL
16 H'FFFF83B0 I/O
PFDR
16 H'FFFF83B2
PEIORL
16 H'FFFF83B4 PFC
PEIORH
16 H'FFFF83B6
PECRL1
16 H'FFFF83B8
PECRL2
16 H'FFFF83BA
PECRH
16 H'FFFF83BC
PEDRH
16 H'FFFF83BE I/O
ICSR1
16 H'FFFF83C0 MTU
OCSR
16 H'FFFF83C2
⎯
Port G data register
⎯
PGDR
⎯ H'FFFF83C4 to ⎯
H'FFFF83CC
8 H'FFFF83CD I/O
⎯
⎯
Compare match timer start
register
CMSTR
Compare match timer
control/status register_0
CMCSR_0
Compare match timer counter_0 CMCNT_0
Compare match timer constant CMCOR_0
register_0
⎯ H'FFFF83CE to ⎯
H'FFFF83CF
16 H'FFFF83D0 CMT
16 H'FFFF83D2
16 H'FFFF83D4
16 H'FFFF83D6
Access Access
Size
States
8, 16, 32
⎯
8, 16, 32
In φ cycles
B: 2
W: 2
L: 4
8, 16
⎯
8, 16, 32
8, 16
8, 16, 32
8, 16
8, 16, 32
8, 16
8, 16, 32
8, 16
8, 16, 32
8, 16
In φ cycles
B: 2
W: 2
L: 4
⎯
8
In Pφ cycles
B: 2
W: 2
L: 4
⎯
⎯
8, 16, 32
8, 16
In φ cycles
B: 2
W: 2
L: 4
8, 16, 32
8, 16
Rev.2.00 Sep. 27, 2007 Page 405 of 448
REJ09B0394-0200