SH7101 Datasheet, PDF (113/486 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

6. Interrupt Controller (INTC)
Interrupt
Source
Name
MTU channel 2 TGIA_2
TGIB_2
TCIV_2
TCIU_2
MTU channel 3 TGIA_3
TGIB_3
TGIC_3
TGID_3
TCIV_3
MTU channel 4 TGIA_4
TGIB_4
TGIC_4
TGID_4
TCIV_4
⎯
Reserved by system
A/D
⎯
CMT
Watchdog
timer
⎯
I/O (MTU)
⎯
ADI0
ADI1
Reserved by system
CMI0
CMI1
ITI
Reserved by system
MTUPOE
Reserved by system
SCI channel 2 ERI_2
RXI_2
TXI_2
TEI_2
Vector
No.
104
105
108
109
112
113
114
115
116
120
121
122
123
124
128 to
135
136
137
140
144
148
152
153
156
160 to
167
168
169
170
171
Vector Table
Starting Address IPR
Default
Priority
H'000001A0
H'000001A4
IPRE15 to
IPRE12
High
H'000001B0
IPRE11 to IPRE8
H'000001B4
H'000001C0
IPRE7 to IPRE4
H'000001C4
H'000001C8
H'000001CC
H'000001D0
IPRE3 to IPRE0
H'000001E0
H'000001E4
IPRF15 to
IPRF12
H'000001E8
H'000001EC
H'000001F0
IPRF11 to IPRF8
H'00000200 to
⎯
H'0000021C
H'00000220
H'00000224
IPRG15 to
IPRG12
H'00000230
⎯
H'00000240
IPRG7 to IPRG4
H'00000250
IPRG3 to IPRG0
H'00000260
IPRH15 to
IPRH12
H'00000264
⎯
H'00000270
IPRH11 to IPRH8
H'00000290 to
⎯
H'0000029C
H'000002A0
IPRI15 to IPRI12
H'000002A4
H'000002A8
H'000002AC
Low
Rev.2.00 Sep. 27, 2007 Page 79 of 448
REJ09B0394-0200