SH7101 Datasheet, PDF (165/486 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

8. Multi-Function Timer Pulse Unit (MTU)
8.3.11 Timer Output Control Register (TOCR)
TOCR is an 8-bit readable/writable register that enables/disables PWM synchronized toggle
output in complementary PWM mode/reset synchronized PWM mode, and controls output level
inversion of PWM output.
Initial
Bit Bit Name value R/W
7
⎯
0
R
6
PSYE
0
R/W
5 to 2 ⎯
All 0
R
1
OLSN
0
R/W
0
OLSP
0
R/W
Description
Reserved
These bits are always read as 0. Only 0 should be written
to this bit.
PWM Synchronous Output Enable
This bit selects the enable/disable of toggle output
synchronized with the PWM period.
0: Toggle output is disabled
1: Toggle output is enabled
Reserved
These bits are always read as 0. Only 0 should be written
to this bit.
Output Level Select N
This bit selects the reverse phase output level in reset-
synchronized PWM mode/complementary PWM mode.
See table 8.26
Output Level Select P
This bit selects the positive phase output level in reset-
synchronized PWM mode/complementary PWM mode.
See table 8.27
Table 8.26 Output Level Select Function
Bit 1
Function
Compare Match Output
OLSN Initial Output Active Level Increment Count
Decrement Count
0
High level
Low level
High level
Low level
1
Low level
High level
Low level
High level
Note: The reverse phase waveform initial output value changes to active level after elapse of the
dead time after count start.
Rev.2.00 Sep. 27, 2007 Page 131 of 448
REJ09B0394-0200