SH7101 Datasheet, PDF (236/486 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

8. Multi-Function Timer Pulse Unit (MTU)
TCFV Flag/TCFU Flag Setting Timing: Figure 8.66 shows the timing for setting of the TCFV
flag in TSR on overflow, and TCIV interrupt request signal timing.
Figure 8.67 shows the timing for setting of the TCFU flag in TSR on underflow, and TCIU
interrupt request signal timing.
Pφ
TCNT input
clock
TCNT
(overflow)
Overflow
signal
H'FFFF
H'0000
TCFV flag
TCIV interrupt
Figure 8.66 TCIV Interrupt Setting Timing
Pφ
TCNT
input clock
TCNT
(underflow)
Underflow
signal
TCFU flag
H'0000
H'FFFF
TCIU interrupt
Figure 8.67 TCIU Interrupt Setting Timing
Rev.2.00 Sep. 27, 2007 Page 202 of 448
REJ09B0394-0200