SH7101 Datasheet, PDF (208/486 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

8. Multi-Function Timer Pulse Unit (MTU)
In the Tb interval (Tb1 in figure 8.35) in which data transfer to the temporary register is not
performed, the temporary register has the same function as the compare register, and is compared
with the counter. In this interval, therefore, there are two compare match registers for one-phase
output, with the compare register containing the pre-change data, and the temporary register
containing the new data. In this interval, the three counters⎯TCNT_3, TCNT_4, and
TCNTS⎯and two registers⎯compare register and temporary register⎯are compared, and PWM
output controlled accordingly.
Rev.2.00 Sep. 27, 2007 Page 174 of 448
REJ09B0394-0200