SH7101 Datasheet, PDF (273/486 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

8. Multi-Function Timer Pulse Unit (MTU)
(17) Operation when Error Occurs during Phase Counting Mode Operation, and Operation
is Restarted in Normal Mode: Figure 8.100 shows an explanatory diagram of the case where an
error occurs in phase counting mode and operation is restarted in normal mode after re-setting.
MTU module
output
TIOC*A
1
2
RESET TMDR
(PCM)
3
TIOR
(1 init
0 out)
4
PFC
(MTU)
5
TSTR
(1)
6
Match
7
8
9
10 11
Error PFC TSTR TMDR TIOR
occurs (PORT) (0) (normal) (1 init
0 out)
12
PFC
(MTU)
13
TSTR
(1)
TIOC*B
Port output
PEn
Hi-Z
PEn
Hi-Z
Note: n = 0 to 15
Figure 8.100 Error Occurrence in Phase Counting Mode, Recovery in Normal Mode
1. After a reset, MTU output is low and ports are in the high-impedance state.
2. Set phase counting mode.
3. Initialize the pins with TIOR. (The example shows initial high output, with low output on
compare-match occurrence.)
4. Set MTU output with the PFC.
5. The count operation is started by TSTR.
6. Output goes low on compare-match occurrence.
7. An error occurs.
8. Set port output with the PFC and output the inverse of the active level.
9. The count operation is stopped by TSTR.
10. Set in normal mode.
11. Initialize the pins with TIOR.
12. Set MTU output with the PFC.
13. Operation is restarted by TSTR.
Rev.2.00 Sep. 27, 2007 Page 239 of 448
REJ09B0394-0200