SH7101 Datasheet, PDF (112/486 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

6. Interrupt Controller (INTC)
Table 6.2 Interrupt Exception Processing Vectors and Priorities
Interrupt
Source
External pin
⎯
⎯
⎯
Interrupts
Name
NMI
Reserved by system
Reserved by system
Reserved by system
IRQ0
IRQ1
IRQ2
IRQ3
Reserved by system
Reserved by system
Reserved by system
Reserved by system
⎯
Reserved by system
Reserved by system
Reserved by system
Reserved by system
MTU channel 0 TGIA_0
TGIB_0
TGIC_0
TGID_0
TCIV_0
MTU channel 1 TGIA_1
TGIB_1
TCIV_1
TCIU_1
Vector
No.
11
12
14
15
64
65
66
67
68
69
70
71
72
76
80
84
88
89
90
91
92
96
97
100
101
Vector Table
Starting Address IPR
Default
Priority
H'0000002C
⎯
High
H'00000030
⎯
H'00000038
⎯
H'0000003C
⎯
H'00000100
IPRA15 to
IPRA12
H'00000104
IPRA11 to IPRA8
H'00000108
IPRA7 to IPRA4
H'0000010C
IPRA3 to IPRA0
H'00000110
⎯
H'00000114
⎯
H'00000118
⎯
H'0000011C
⎯
H'00000120
⎯
H'00000130
⎯
H'00000140
⎯
H'00000150
⎯
H'00000160
H'00000164
IPRD15 to
IPRD12
H'00000168
H'0000016C
H'00000170
IPRD11 to IPRD8
H'00000180
IPRD7 to IPRD4
H'00000184
H'00000190
IPRD3 to IPRD0
H'00000194
Low
Rev.2.00 Sep. 27, 2007 Page 78 of 448
REJ09B0394-0200