C508_01 Datasheet, PDF (75/267 Pages) Infineon Technologies AG – 8-Bit CMOS Microcontroller

C508
On-Chip Peripheral Components
6.1.3 Detailed Output Driver Circuitry
In fact, the pull-ups mentioned before and included in Figure 6-2, Figure 6-4, and
Figure 6-5 are pull-up arrangements. The differences which apply to the various port
types available in the C508 are described in the following sections.
6.1.3.1 Type B Port Driver Circuitry
Figure 6-6 shows the output driver circuit of the type B multifunctional digital I/O port
lines. The basic circuitry of these ports is shown in Figure 6-4. The pull-up arrangement
of type B port lines has one n-channel pull-down FET and three pull-up FETs:
=1
Delay
1 State
Q
Input Data (Read Pin)
V_DD
≥1
p1
p2
p3
n1
V_SS
=1
=1
Port
Pin
MCS04047
Figure 6-6 Driver Circuit of Type B Port Pins
– The pull-down FET n1 is an n-channel type. It is a very strong driver transistor
which is capable of sinking high currents (I_OL); it is only activated if a ‘0’ is
programmed to the port pin. A short circuit to V_DD must be avoided if the transistor
is turned on, since the high current might destroy the FET. This also means that no
‘0’ must be programmed into the latch of a pin that is used as input.
– The pull-up FET p1 is a p-channel type. It is activated for two oscillator periods
(S1P1 and S1P2) if a 0-to-1 transition is programmed to the port pin; that is, a ‘1’ is
programmed to the port latch which contained a ‘0’. The extra pull-up can drive a
similar current as the pull-down FET n1. This provides a fast transition of the logic
levels at the pin.
– The pull-up FET p2 is a p-channel type. It is always activated when a ‘1’ is in the
port latch, thus providing the logic high output level. This pull-up FET sources a
User’s Manual
6-10
2001-05