C508_01 Datasheet, PDF (245/267 Pages) Infineon Technologies AG – 8-Bit CMOS Microcontroller

C508
Power Saving Modes
two machine cycles, ALE and PSEN behave as shown in Figure 9-1 (that is, at the
beginning of Phase 5). Instruction fetches during the interrupt call are, however,
discarded.
5. After the RETI instruction of the power-down wake-up interrupt routine has been
executed, the instruction which follows the double instruction sequence to initiate the
power-down mode will be executed. The functionality of the peripheral units timer 0/
1/2, Capture/Compare Unit, and WDT are frozen until end of Phase 5.
All interrupts of the C508 are disabled from Phase 2 until the end of Phase 5. Other
Interrupts can be first handled after the RETI instruction of the wake-up interrupt routine.
The procedure to exit the software power-down mode via the P5.7/INT7 pin is identical
to the above procedure except that in this case pin P5.7/INT7 replaces pin P3.2/INT0,
and bit WS in SFR PCON1 should be set prior to entering software power-down mode.
User’s Manual
9-9
2001-05