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C508_01 Datasheet, PDF (228/267 Pages) Infineon Technologies AG – 8-Bit CMOS Microcontroller
C508
Fail Save Mechanisms
SFRs WDTL and WDTH are read-only registers which hold the current watchdog timer
value. They are write-protected in order to enhance the integrity of the watchdog timer
as a fail safe mechanism. By reading these two registers, the current value of the
watchdog timer can be obtained.
Special Function Register WDTH (Address 85H)
Special Function Register WDTL (Address 84H)
Reset Value: X0000000B
Reset Value: 00H
MSB
Bit No. 7
6
85H
−
5
4
3
2
1
WDT Value, Upper 7 bits
LSB
0
WDTH
84H
WDT Value, Low Byte
WDTL
Bit
WDTH.6 - 0
WDTL.7 - 0
Function
Watchdog Timer value, upper 7 bits.
Loaded with WDTREL.6 - 0 after a watchdog timer refresh.
Watchdog Timer value, low byte.
Reset to zero after a watchdog timer refresh.
User’s Manual
8-2
2001-05