C508_01 Datasheet, PDF (139/267 Pages) Infineon Technologies AG – 8-Bit CMOS Microcontroller

C508
On-Chip Peripheral Components
Compare Output Initialization Register COINI
The six lower bits of the COINI register define the initial values (passive levels) of the
Port 1 lines, which are programmed to be used as a compare output. If an output of the
CAPCOM unit is enabled for compare mode operation by writing the corresponding bit
combination into the CMSEL0/CMSEL1 registers, the compare output is switched into
push-pull mode and starts driving an initial logic level as defined by the bits of the COINI
register.
Bit COUTXI controls an inverter for the COMP unit output signal, when it is wired to the
CCx and COUTx outputs in burst or multi-channel PWM mode. COUT3I defines the
initial logic level at COUT3 before Compare Timer 2 is started as well as the logic state
when COUT3 is disabled by setting bit ECT2O in SFR CT2CON (see Figure 6-32).
The COINI register should be written prior to the starting of the compare timers. Any write
operation to the COINI register when the compare timer is running will affect the
compare output signals immediately and drive the logic value as defined by the bits of
COINI.
A PWM output signal of the C508 basically consists of two phases, an inactive phase
and an active phase. The inactive phase of a PWM output signal is defined by the bit in
the register COINI. A ‘1’ in bit location 0 to 5 of COINI defines the high level of the
corresponding PWM compare output signal as its inactive phase. With a ‘0’, a low level
is selected as the inactive phase.
User’s Manual
6-74
2001-05