C508_01 Datasheet, PDF (141/267 Pages) Infineon Technologies AG – 8-Bit CMOS Microcontroller

C508
On-Chip Peripheral Components
Trap Enable Register
The trap enable register TREN is used to enable selectively the compare outputs of the
three CAPCOM channels for switching it into high or low level in the trap state as defined
by the bits of the COTRAP register. Additionally, for a general enable of the trap function,
bit TRPEN must be set. The TRF flag indicates when a low level is detected at the
CTRAP input signal.
Special Function Register TRCON (Address FF_H)
Reset Value: 00_H
Bit No. MSB
7
FF_H TRPEN
6
TRF
LSB
5
4
3
2
1
0
TREN5 TREN4 TREN3 TREN2 TREN1 TREN0 TRCON
CAPCOM
Channel 2
CAPCOM
Channel 1
CAPCOM
Channel 0
Bit
TRPEN
TRF
TREN5-0
Function
External CTRAP trap function enable bit
This bit is a general enable bit for the trap function of the CTRAP
input signal.
TRPEN = 0: External trap input CTRAP is disabled (default after
reset).
TRPEN = 1: External trap input CTRAP is enabled;
Trap flag
TRF is set by hardware if the trap function is enabled
(TRPEN = 1) and the CTRAP level becomes active (low). If
enabled, an interrupt is generated when TRF is set. TRF must
be reset by software.
Trap enable control bits
Bits at even bit positions (0, 2, 4) are assigned to the CCx
Compare outputs. Bits at odd bit positions (1, 3, 5) are assigned
to the COUTx Compare outputs.
TRENx = 0: Compare channel output provides CAPCOM
output signal in trap state.
TRENx = 1: Compare channel output is enabled to set the logic
level of the compare output CCx or COUTx in the
trap state to a logic state as defined by the
corresponding bits of the COTRAP register.
When writing TREN0-5, bit TRF should be reset to 0. Otherwise,
setting TREN0-5 will generate a software trap interrupt.
User’s Manual
6-76
2001-05