C508_01 Datasheet, PDF (243/267 Pages) Infineon Technologies AG – 8-Bit CMOS Microcontroller

C508
Power Saving Modes
down capability must also be used, its function must be enabled using the following
instruction sequence prior to executing the double instruction sequence shown above.
ORL SYSCON,#00010000B ;set RMAP
ORL PCON1,#80H
;enable wake-up from power down via P3.2/INT0
ANL SYSCON,#11101111B ;reset RMAP (for future SFR accesses)
Setting EWPD automatically disables all interrupts still maintaining the actual values of
the interrupt enable bits. In the above sequence, the value of register PCON1 should be
modified for choosing a wake-up via the P5.7/INT7 (bit PCON1.4 should be set).
Note: Before entering the power-down mode, an A/D conversion in progress must be
stopped.
9.4.2 Exit from Software Power Down Mode
If power-down mode is left via a hardware reset, the microcontroller with its SFRs is put
into the hardware reset state and the contents of RAM and XRAM are not changed. The
reset signal that terminates the power-down mode also restarts the RC oscillator, the on-
chip oscillator, and the PLL. The reset operation should not be activated before V_DD is
restored to its normal operating level and must be held active long enough to allow the
oscillator to restart and stabilize (similar to power-on reset).
Figure 9-1 shows the procedure which must be executed when power-down mode is left
via the P3.2/INT0 or the P5.7/INT7 wake-up capability.
User’s Manual
9-7
2001-05