C508_01 Datasheet, PDF (17/267 Pages) Infineon Technologies AG – 8-Bit CMOS Microcontroller

C508
Introduction
Table 1-1 Pin Definitions and Functions (cont’d)
Symbol
Pin Numbers
I/O¹⁾ Function
P-MQFP-64 P-SDIP-64
PSEN
46
54
O The Program Strobe Enable
output is a control signal that enables the external
program memory to the bus during external fetch
operations. It is activated every one and a half
oscillator periods except during external data
memory accesses. Remains high during internal
program execution. This pin should not be driven
during reset operation.
ALE
45
53
O The Address Latch Enable
output is used for latching the low-byte of the
address into external memory during normal
operation. It is activated every one and a half
oscillator periods except during an external data
memory access. When instructions are executed
from internal ROM (EA = 1) the ALE generation can
be disabled by bit EALE in SFR SYSCON. This pin
should not be driven during reset operation.
EA
2
10
I External Access Enable
When held at high level, instructions are fetched
from the internal ROM when the PC is less than
8000_H. When held at low level, the C508 fetches all
instructions from external program memory. This
pin should not be driven during reset operation.
P0.0-P0.7 57 - 64
1-8
I/O Port 0
is an 8-bit open-drain bidirectional I/O port. Port 0
pins that have 1’s written to them float, and in that
state can be used as high-impedance inputs. Port 0
is also the multiplexed low-order address and data
bus during accesses to external program or data
memory. In this application, it uses strong internal
pull-up transistors when issuing 1’s.
Port 0 also outputs the code bytes during program
verification in the C508-4R. External pull-up
resistors are required during program verification.
User’s Manual
1-9
2001-05