C508_01 Datasheet, PDF (220/267 Pages) Infineon Technologies AG – 8-Bit CMOS Microcontroller

C508
Interrupt System
7.2.3 Interrupt Priority Registers
The lower six bits of these two registers are used to define the Interrupt Priority level of
the interrupt groups as they are defined in Table 7-1 in the next section.
Special Function Register IP0 (Address A9_H)
Special Function Register IP1 (Address B9_H)
Reset Value: 00_H
Reset Value: XX000000_B
MSB
LSB
Bit No. 7
6
5
4
3
2
1
0
A9_H OWDS WDTS IP0.5 IP0.4 IP0.3 IP0.2 IP0.1 IP0.0 IP0
Bit No. 7
B9_H
–
6
5
4
3
2
1
0
– IP1.5 IP1.4 IP1.3 IP1.2 IP1.1 IP1.0 IP1
The shaded bits are not used for interrupt control.
Bit
IP1.x
IP0.x
Function
Interrupt group Priority level bits (x = 0-5, see Table 7-1)
IP1.x IP0.x
0
0
0
1
1
0
1
1
Function
Interrupt group x is set to Priority level 0
(lowest)
Interrupt group x is set to Priority level 1
Interrupt group x is set to Priority level 2
Interrupt group x is set to Priority level 3
(highest)
User’s Manual
7-22
2001-05