C508_01 Datasheet, PDF (158/267 Pages) Infineon Technologies AG – 8-Bit CMOS Microcontroller

C508
On-Chip Peripheral Components
Figure 6-36 gives an example of a block commutation mode timing (only COUTx outputs
are modulated with Compare Timer 2 output signal). It shows the case for rotate left at
60° phase shift (BCM1, BCM0 = 1, 0; BCTSEL = 0) and the rotate right case (BCM1,
BCM0 = 0, 1). For the timing shown in Figure 6-36 the COINI register is set to
XX111111_B. This means that a high level is defined as inactive phase. The CMSELx.3
bits in the CMSEL0/CMSEL1 registers must also be set (Compare Timer 2 switched to
COUTx during active phase). The timing shown below is directly derived from
Table 6-10.
a) Block commutation mode timing in rotate left mode (BCM1, 0 = 1, 0)
INT0
1
1
1
0
0
0
INT1
0
0
1
1
1
0
INT2
1
0
0
0
1
1
CC0
CC1
CC2
COUT0
COUT1
COUT2
Input
Signals
Output
Signals
b) Block commutation mode timing in rotate right mode (BCM1, 0 = 0, 1)
INT0
1
1
1
0
0
0
INT1
1
0
0
0
1
1
INT2
0
0
1
1
1
0
CC0
CC1
CC2
COUT0
COUT1
COUT2
Figure 6-36 Block Commutation Mode Timing
User’s Manual
6-93
Input
Signals
Output
Signals
MCT02611
2001-05