C508_01 Datasheet, PDF (48/267 Pages) Infineon Technologies AG – 8-Bit CMOS Microcontroller

C508
External Bus Interface
4.6
Eight Datapointers for Faster External Bus Access
4.6.1 The Importance of Additional Datapointers
The standard 8051 architecture provides only one 16-bit pointer for indirect addressing
of external devices (memories, peripherals, latches, etc.). Except for a 16-bit “move
immediate” to this datapointer and an increment instruction, any other pointer handling
must be handled bytewise. For complex applications with peripherals located in the
external data memory space or extended data storage capacity, this factor turned out to
be a “bottle neck” for the 8051’s communication to the external world. In particular,
programming in high-level languages (PLM51, C51, PASCAL51) requires extended
RAM capacity and at the same time a fast access to this additional RAM because of the
reduced code efficiency of these languages.
4.6.2 Implementation of the Eight Datapointers
Simply adding more datapointers is not suitable because of the need to keep up 100%
compatibility with the 8051 instruction set. This instruction set, however, allows the
handling of only one single 16-bit datapointer (DPTR, consisting of the two 8-bit SFRs
DPH and DPL).
To meet both of the above requirements (speed up external accesses and 100%
compatibility with 8051 architecture), the C508 contains a set of eight 16-bit registers
from which the actual datapointer can be selected.
This means that the user’s program may keep up to eight 16-bit addresses resident in
these registers; but, only one register at a time is selected to be the datapointer. Thus,
the datapointer in turn is accessed (or selected) via indirect addressing. This indirect
addressing is done through a special function register called DPSEL (Data Pointer
Select register). All instructions of the C508 which handle the datapointer, therefore,
affect only one of the eight pointers which is addressed by DPSEL at that very moment.
Figure 4-3 illustrates the addressing mechanism. A 3-bit field in register DPSEL points
to the DPTRx currently used. Any standard 8051 instruction (such as MOVX @DPTR, A
- transfer a byte from accumulator to an external location addressed by DPTR) now uses
this activated DPTRx.
User’s Manual
4-6
2001-05