C508_01 Datasheet, PDF (250/267 Pages) Infineon Technologies AG – 8-Bit CMOS Microcontroller

C508
OTP Memory Operation
10.3
Pin Definitions
Table 10-1 contains the functional descriptions of all C508-4E pins which are required
for OTP memory programming.
Table 10-1
Symbol
Pin Definitions and Functions of the C508-4E
in Programming Mode
Pin Number I/O¹⁾ Function
P-MQFP- P-SDIP-
64-1
64-2
RESET 1
9
I Reset
This input must be at static ‘1’ (active) level
throughout the entire programming mode.
PMSEL0 33
PMSEL1 34
41
I Programming mode selection pins
42
I These pins are used to select the different
access modes in programming mode.
PMSEL1, 0 must satisfy a setup time to the
rising edge of PALE. When the logic level of
PMSEL1, 0 is changed, PALE must be at low
level.
PMSEL1 PMSEL0 Access Mode
0
0
Reserved
0
1
Read signature bytes
1
0
Program/read lock bits
1
1
Program/read OTP
memory byte
PSEL 35
PRD
36
43
I Basic programming mode select
This input is used for the basic programming
mode selection and must be switched according
to Figure 10-4.
44
I Programming mode read strobe
This input is used for read access control for
OTP memory read, version byte read, and lock
bit read operations.
User’s Manual
10-4
2001-05