C508_01 Datasheet, PDF (137/267 Pages) Infineon Technologies AG – 8-Bit CMOS Microcontroller

C508
On-Chip Peripheral Components
Capture/Compare Interrupt Enable Register
The bits of the interrupt enable register CCIE control the specific interrupt enable/disable
functions of the CAPCOM part of the Capture/Compare unit.
The bits ECTP and ECTC control the Compare Timer 1 period/count change interrupt.
Depending on the mode in which Compare Timer 1 is running, interrupts can be
generated at a period match or a count direction change event.
The lower 6 bits of CCIE are the CAPCOM channel specific interrupt enable/disable
control bits for the capture or compare match interrupt. The functions of these bits
depend on the selected mode (capture or compare) of a capture/compare channel. In
compare mode, compare channel specific interrupts can be generated at a match event
between compare register content and compare timer 1 count value during the up- or
down-counting phase of Compare Timer 1. In capture mode, capture channel specific
interrupts can be generated selectively at rising or falling or both edges of the capture
input signals at CCx.
Special Function Registers CCIE (Address D6_H)
Reset Value: 00_H
Bit No.
D6_H
MSB
7
ECTP
LSB
6
5
4
3
2
1
0
ECTC CC2FEN CC2REN CC1FEN CC1REN CC0FEN CC0REN
CCIE
Bit
ECTP
Function
Enable Compare Timer 1 period interrupt
If ECTP = 0, the Compare Timer 1 period interrupt is disabled.
Compare Timer 1 operating mode 0:
If ECTP = 1, an interrupt is generated when Compare Timer 1
reaches the period value.
Compare timer 1 operating mode 1:
If ECTP = 1, an interrupt is generated when Compare Timer 1
reaches the period value and changes the count direction from
up- to down-counting.
User’s Manual
6-72
2001-05