C508_01 Datasheet, PDF (234/267 Pages) Infineon Technologies AG – 8-Bit CMOS Microcontroller

C508
Fail Save Mechanisms
8.2.1 Detailed Description of the Oscillator Watchdog Unit
Figure 8-3 shows the block diagram of the Oscillator Watchdog unit. It consists of an
internal RC oscillator which provides the reference frequency for comparison with the
frequency of the on-chip oscillator. It also shows the additional provisions for integration
of wake-up from power-down mode.
EWPD
(PCON1.0)
WS
(PCON1.4)
P5.7/
INT7
P3.2/
INT0
Control
Logic
RC
Oscillator
Start/
stop
f_RC
Power-down
mode activated
÷ 5 ^f1
f₂
Frequency
Comparator
f₂ < f₁
Control
Logic
Delay
Power-down mode
wake-up interrupt
Internal Reset
≥1
XTAL2
XTAL1
Start/
stop
On-Chip
Oscillator f_OSC
OWDS
IP0 (A9_H)
System Clock
System
Clock
(2 x f_OCS)
Generator
MCB04088
Figure 8-3 Functional Block Diagram of the Oscillator Watchdog
The frequency from the RC oscillator is divided by 5 and compared to the on-chip
oscillator’s frequency. If the frequency from the on-chip oscillator is found to be lower
than the frequency derived from the RC oscillator, the Watchdog detects a failure
condition. In this case, the RC oscillator provides the clock source for system clock
generation. This means that the part is being clocked even if the on-chip oscillator has
stopped or has not yet started. At the same time, the Watchdog activates the internal
reset to bring the part into its defined reset state. The reset is performed because a clock
User’s Manual
8-8
2001-05