C508_01 Datasheet, PDF (38/267 Pages) Infineon Technologies AG – 8-Bit CMOS Microcontroller

C508
Memory Organization
Table 3-2 Special Function Registers - Functional Blocks (cont’d)
Block Symbol Name
Address Contents
after
Reset
Compare/
Capture
Unit
CT1CON
CCPL
CCPH
CT1OFL
CT1OFH
CMSEL0
CMSEL1
COINI
CCL0
CCH0
CCL1
CCH1
CCL2
CCH2
TRCON
COTRAP
CCIR
CCIE¹⁾
CT2CON
CP2L
CP2H
CMP2L
CMP2H
BCON
Watchdog WDTL
Timer
WDTH
WDTREL
IEN0¹⁾
IEN1¹⁾
IP0¹⁾
Power
Save
PCON¹⁾
PCON1²⁾
Modes
Compare Timer 1 Control Register
E1_H
Compare Timer 1 Period Register, Low Byte DE_H
Compare Timer 1 Period Register, High Byte DF_H
Compare Timer 1 Offset Register, Low Byte E6_H
Compare Timer 1 Offset Register, High Byte E7_H
Capture/Compare Mode Select Register 0
E3_H
Capture/Compare Mode Select Register 1
E4_H
Compare Output Initialization Register
E2_H
Capture/Compare Register 0, Low Byte
F2_H
Capture/Compare Register 0, High Byte
F3_H
Capture/Compare Register 1, Low Byte
F4_H
Capture/Compare Register 1, High Byte
F5_H
Capture/Compare Register 2, Low Byte
F6_H
Capture/Compare Register 2, High Byte
F7_H
Trap Enable Control Register
FF_H
Compare Output In Trap State Register
F9_H
Capture/Compare Interrupt Request Flag Reg. E5_H
Capture/Compare Interrupt Enable Register D6_H
Compare Timer 2 Control Register
F1_H
Compare Timer 2 Period Register, Low Byte D2_H
Compare Timer 2 Period Register, High Byte D3_H
Compare Timer 2 Compare Register, Low Byte D4_H
Compare Timer 2 Compare Register, High Byte D5_H
Block Commutation Control Register
D7_H
Watchdog Timer Register, Low Byte
Watchdog Timer Register, High Byte
Watchdog Timer Reload Register
Interrupt Enable Register 0
Interrupt Enable Register 1
Interrupt Priority Register 0
84_H
85_H
86_H
A8_H³⁾
B8_H³⁾
A9_H
Power Control Register
Power Control Register 1
87_H
88_H³⁾
00010000_B
00_H
00_H
00_H
00_H
00_H
00_H
FF_H
00_H
00_H
00_H
00_H
00_H
00_H
00_H
00_H
00_H
00_H
00010000_B
00_H
XXXXXX00_B4)
00_H
XXXXXX00_B4)
00_H
00_H
X0000000_B
00_H
00_H
00_H
00_H
00_H
0XX0XXXX_B4)
1) _{This special function register is listed repeatedly as some bits of it also belong to other functional blocks.}
2) _{This SFR is a mapped SFR. To access this SFR, bit RMAP in SFR SYSCON must be set.}
3) _{Bit-addressable special function registers.}
4) _{“X” means that the value is undefined and the location is reserved.}
5) _{The content of this SFR varies with the actual step of the C508 (e.g. 01H for C508-4E, first step and 11H for}
C508-4R, first step).
User’s Manual
3-14
2001-05