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C508_01 Datasheet, PDF (259/267 Pages) Infineon Technologies AG – 8-Bit CMOS Microcontroller
C508
OTP Memory Operation
10.7
Access of Version Bytes
The C508-4E and C508-4R provide three version bytes at address locations FCH, FDH,
and FEH. The information stored in the version bytes, is defined by the mask of each
microcontroller step. Therefore, the version bytes can be read but cannot be written. The
three Version Registers hold such information as manufacturer code, device type, and
stepping code.
To read the version bytes, the control lines must be used in accordance with Table 10-2
and Figure 10-8. The address of the version byte must be applied at the Port 2 address
lines. PALE must not be activated.
PMSEL1, 0
0.1
PALE
Port 2
FC
FD
FE
Port 0
VR0
VR1
VR2
PROG
PRD
MCT04095
Figure 10-8 Read Version Register(s) Waveform
Version bytes are typically used by programming systems for adapting the programming
firmware to specific device characteristics such as OTP size, etc.
Note: The three version bytes are implemented in such a way that they can be also be
read during normal program execution mode as a mapped register with bit RMAP
in SFR SYSCON set. The addresses of the version bytes in normal mode and
programming mode are identical and, therefore, they are located in the SFR
address range.
User’s Manual
10-13
2001-05