C508_01 Datasheet, PDF (224/267 Pages) Infineon Technologies AG – 8-Bit CMOS Microcontroller

C508
Interrupt System
Thus, the processor acknowledges an interrupt request by executing a hardware-
generated LCALL to the appropriate servicing routine. In some cases it also clears the
flag that generated the interrupt, while in other cases it does not; then this must be done
by the user’s software. The hardware clears the external interrupt flags IE0 and IE1 only
if they were transition-activated. The hardware-generated LCALL pushes the contents of
the program counter onto the stack (but it does not save the PSW) and reloads the
program counter with an address that depends on the source of the interrupt being
vectored to, as shown in the following Table 7-3.
Table 7-3 Interrupt Source and Vectors
Interrupt Source
Interrupt Vector
Address
External Interrupt 0
Timer 0 Overflow
External Interrupt 1
Timer 1 Overflow
Serial Channel
Timer 2 Overflow
A/D Converter
External Interrupt 2
External Interrupt 3
External Interrupt 4
External Interrupt 5
External Interrupt 6
CAPCOM Emergency Interrupt
Compare Timer 2 Interrupt
Capture/Compare Match Interrupt
Compare Timer 1 Interrupt
External Interrupt 7
External Interrupt 8
External Interrupt 9
Wake-up from power-down mode
0003_H
000B_H
0013_H
001B_H
0023_H
002B_H
0043_H
004B_H
0053_H
005B_H
0063_H
006B_H
0093_H
009B_H
00A3_H
00AB_H
00D3_H
00DB_H
00E3_H
007B_H
Interrupt Request
Flags
IE0
TF0
IE1
TF1
RI / TI
TF2
IADC
IEX2
IEX3
IEX4
IEX5
IEX6
TRF/BCERR
CT2P
CCxF/CCxF, x = 0 to 2
CT1FP/CT1FC
IEX7
IEX8
IEX9
–
User’s Manual
7-26
2001-05