C508_01 Datasheet, PDF (123/267 Pages) Infineon Technologies AG – 8-Bit CMOS Microcontroller

C508
On-Chip Peripheral Components
Burst mode of a COUTx output is enabled by the bit CMSELx3, located in the mode
select registers CMSEL0 and CMSEL1. Figure 6-30 shows four CAPCOM output
signals with different initial logic states with burst mode disabled (CMSELx3 = 0) and
burst mode enabled (CMSELx3 = 1). Generally, the CCx outputs cannot operate in burst
mode. Optionally, the signal at COUTx may have inverted polarity than the PWM signal
which is available at pin COUT3.
Depending on the corresponding initial compare output level bit in COINI, either a low or
high level for the non-modulated state at the COUTx pins can be selected. Burst mode
can be enabled in both operating modes of the Compare Timer 1. The burst mode as
shown in Figure 6-30 is only valid if the block commutation mode of the CCU is disabled
(bit BCEN of SFR BCON cleared).
Modulation of the compare output signals at COUTx is switched on (COUT3 signal is
switched to COUTx) when the Compare Timer 1 contents plus the value stored in the
Compare Timer 1 offset register are equal to or greater than the value stored in the
compare register of CAPCOM channel x.
6.3.2.6 CAPCOM Unit in Capture Mode
The three channels of the CAPCOM unit can be individually programmed to operate in
capture mode. In capture mode, each CAPCOM channel offers one capture input at pin
CCx. Compare Timer 1 runs either in operating mode 0 or 1. A rising or/and falling edge
at CCx will copy the actual value of the Compare Timer 1 into the Compare/Capture
registers. Interrupts can be generated selectively at each transition of the capture input
signal.
Capture mode is selected by writing the mode select registers CMSEL1 and CMSEL0
with the appropriate values. The bit combinations in CMSEL0 and CMSEL1 also define
the signal transition type (falling/rising edge) which generates a capture event. If a
CAPCOM channel is enabled for capture mode, its CCx input is sampled with 1/(4 TCL)
(i.e. 2 f_OSC = twice external oscillator clock rate).
Consecutive capture events, generated through signal transitions at a CCx capture
input, overwrite the corresponding 16-bit Compare/Capture register contents. This must
be considered when successive signal transitions are processed.
User’s Manual
6-58
2001-05