C508_01 Datasheet, PDF (42/267 Pages) Infineon Technologies AG – 8-Bit CMOS Microcontroller

C508
Memory Organization
Table 3-3 Contents of the SFRs, SFRs in Numeric Order by Address (cont’d)
Addr
Register Content Bit 7
after
Reset¹⁾
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
F7_H
F8_H2)
F9_H
CCH2 00_H
P5
FF_H
COTRAP 00_H
.7
.7
BCT
SEL
.6
.6
RES
.5
.4
.5
.4
COUT2 CC2T
T
.3
.2
.3
.2
COUT1 CC1T
T
.1
.0
.1
.0
COUT0 CC0T
T
FB_H EINT
XX00- –
–
IEX9 I9FR IEX8 I8FR IEX7 I7FR
0000_B
FC_H VR0
C5_H
1
1
0
0
0
1
0
1
3)4)
FD_H VR1
08_H
0
0
0
0
1
0
0
0
3)4)
FE_H VR2
5)
3)4)
.7
.6
.5
.4
.3
.2
.1
.0
FF_H TRCON 00_H
TRPEN TRF TREN5 TREN4 TREN3 TREN2 TREN1 TREN
0
1) _{X means that the value is undefined and the location is reserved.}
2) _{Bit-addressable special function registers.}
3) _{SFR is located in the mapped SFR area. To access this SFR, bit RMAP in SFR SYSCON must be set.}
4) _{These are read-only registers.}
5) _{The content of this SFR varies with the actual step of the C508 (e.g. 01H for C508-4E, first step and 11H for}
C508-4R, first step).
User’s Manual
3-18
2001-05