C508_01 Datasheet, PDF (173/267 Pages) Infineon Technologies AG – 8-Bit CMOS Microcontroller

C508
On-Chip Peripheral Components
6.4.3.3 Baudrate in Mode 1 and 3
In these modes the baudrate is variable and can be generated alternatively by a
baudrate generator or by Timer 1.
6.4.3.3.1 Using the Internal Baudrate Generator
In Modes 1 and 3, the C508 can use an internal baudrate generator for the serial port.
To enable this feature, bit BD (bit 7 of special function register ADCON0) must be set.
Bit SMOD (PCON.7) controls a divide-by-2 circuit which affect the input and output clock
signal of the baudrate generator. After reset the divide-by-2 circuit is active and the
resulting overflow output clock will be divided by 2. The input clock of the baudrate
generator is 2 × f_OSC (output of PLL).
Baudrate Generator
SRELH
.1 .0
SRELL
2f_OSC
Input
Clock
10-Bit Timer
Overflow
PCON.7
(SMOD)
÷2
0
Baudrate
Clock
1
MCS04075
Figure 6-42 Serial Port Input Clock when using the Baudrate Generator
The baudrate generator consists of a free running upward counting 10-bit timer. On
overflow of this timer (next count step after counter value 3FF_H) there is an automatic
10-bit reload from the registers SRELL and SRELH. The lower 8 bits of the timer are
reloaded from SRELL, while the upper two bits are reloaded from bit 0 and 1 of register
SRELH. The baudrate timer is reloaded by writing to SRELL.
User’s Manual
6-108
2001-05