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C508_01 Datasheet, PDF (102/267 Pages) Infineon Technologies AG – 8-Bit CMOS Microcontroller
C508
On-Chip Peripheral Components
Timer 2 is incremented with every machine clock (fOSC/6); thus, both these spikes are
approximately 150 ns long at 20-MHz operational frequency.
a) CCHx/CCLx = 0000H or = CRCH/CRCL (maximum duty cycle)
P5.x
H
L
Appr.1/2 Machine Cycle
b) CCHx/CCLx = FFFFH (minimum duty cycle)
P5.x
Appr.1/2 Machine Cycle
H
L
MCD04059
Figure 6-18 PWM Signal Modulation Range (generated with a Timer 2/CCx
Register Combination in Compare Mode 0*)
The following illustrates the calculation of The modulation range for a PWM signal. To
calculate with reasonable numbers, a reduction of the resolution to 8-bit is used.
Otherwise (for the maximum resolution of 16-bit) the modulation range would be so
severely limited that it would be negligible.
Example:
Case: Timer 2 in auto-reload mode.
Contents of reload register CRC = FF00H
Restriction of modulation range = 1 / (256 × 2) × 100% = 0.195%
This leads to a variation of the duty cycle from 0.195% to 99.805% for a timer 2/CCx
register configuration when 8 of the 16 bits are used.
User’s Manual
6-37
2001-05