C508_01 Datasheet, PDF (156/267 Pages) Infineon Technologies AG – 8-Bit CMOS Microcontroller

C508
On-Chip Peripheral Components
6.3.4.3 Block Commutation PWM Mode
In block commutation mode the INT0-2 inputs are sampled once each processor cycle.
If the input signal combination at INT0-2 changes its state, the outputs CCx and COUTx
are set to their new state according to Table 6-10.
Table 6-10 Block Commutation Control Table
Mode
(BCM1,
BCM0)
Rotate left¹⁾
Rotate right¹⁾
INT0 - INT2
Inputs
CC0 - CC2
Outputs
COUT0 - COUT2
Outputs
INT0 INT1 INT2 CC0 CC1 CC2 COUT0 COUT1 COUT2
0 0 0 inactive inactive inactive inactive inactive inactive
1 1 1 inactive inactive inactive inactive inactive inactive
Rotate left, 1 0 1 inactive inactive active active inactive inactive
60° phase _{1 0 0 inactive active inactive active inactive inactive}
shift
(BCTSEL = 0, ^{1 1 0 inactive active inactive inactive inactive active}
default)
0 1 0 active inactive inactive inactive inactive active
0 1 1 active inactive inactive inactive active inactive
0 0 1 inactive inactive active inactive active inactive
Rotate left, 1 0 1 inactive inactive active inactive active inactive
0° phase shift _{1 0 0 inactive inactive active active inactive inactive}
(BCTSEL - 1)
1 1 0 inactive active inactive active inactive inactive
0 1 0 inactive active inactive inactive inactive active
0 1 1 active inactive inactive inactive inactive active
0 0 1 active inactive inactive inactive active inactive
Rotate right 1 1 0 active inactive inactive inactive active inactive
1 0 0 active inactive inactive inactive inactive active
1 0 1 inactive active inactive inactive inactive active
0 0 1 inactive active inactive active inactive inactive
0 1 1 inactive inactive active active inactive inactive
0 1 0 inactive inactive active inactive active inactive
Slow down X X X inactive inactive inactive active active active
Idle²⁾
X X X inactive inactive inactive inactive inactive inactive
1) _{If one of these two combinations of INTx signals is detected in rotate left or rotate right mode, bit BCERR flag}
is set. If enabled, a CCU emergency interrupt can be generated. When these states (error states) are reached,
idle state is entered immediately.
User’s Manual
6-91
2001-05