C508_01 Datasheet, PDF (251/267 Pages) Infineon Technologies AG – 8-Bit CMOS Microcontroller

C508
OTP Memory Operation
Table 10-1
Symbol
Pin Definitions and Functions of the C508-4E
in Programming Mode (cont’d)
Pin Number I/O¹⁾ Function
P-MQFP- P-SDIP-
64-1
64-2
PALE 37
45
I Programming address latch enable
PALE is used to latch the high address lines.
The high address lines must satisfy a setup and
hold time to/from the falling edge of PALE.
PALE must be at low level when the logic level
of PMSEL1, 0 is changed.
XTAL2 47
49
O XTAL2
Output of the inverting oscillator amplifier.
XTAL1 48
50
I XTAL1
Input to the oscillator amplifier.
V_SS
24, 43, 55 32, 51, – Ground (0 V)
63
must be applied in programming mode.
V_DD
23, 44, 56 31, 52, – Power Supply (+5 V)
64
must be applied in programming mode.
P2.0-
P2.7
54 - 47 62 - 55 I
Address lines
P2.0-P2.7 are used as multiplexed address
input lines A0-A7 and A8-A14. A8-A14 must be
latched with PALE.
PSEN 46
54
I Program store enable
This input must be at static 0 level during the
whole programming mode.
PROG 45
53
I Programming mode write strobe
This input is used in programming mode as a
write strobe for OTP memory program and lock
bit write operations. During basic programming
mode selection, a low level must be applied to
PROG.
User’s Manual
10-5
2001-05