HD6433308 Datasheet, PDF (77/349 Pages) Hitachi Semiconductor – Hitachi Single-Chip MicroComputer

RES
Vector fetch
Internal
process-
ing
Instruction prefetch
Ø
A15 to A0
RD
(1)
(3)
(5)
(7)
WR
D7 to D 0
(8 bits)
(2)
(4)
(6)
(8)
(1),(3) Reset vector address: (1)=H'0000, (3)=H'0001
(2),(4) Starting address of reset routine (contents of reset vector): (2)=upper byte, (4)=lower byte
(5),(7) Starting address of reset routine: (5)=(2)(4), (7)=(2)(4)+1
(6),(8) First instruction of reset routine: (6)=first byte, (8)=second byte
Figure 4-2. Reset Sequence (Mode 1)