HD6433308 Datasheet, PDF (303/349 Pages) Hitachi Semiconductor – Hitachi Single-Chip MicroComputer

Appendix B. Instruction Set List (cont.)
Mnemonic
Operation
Addressing mode/
instruction length
Condition code
JSR @Rn
– SP–2 → SP
I H N ZV C
2
––––––6
PC → @SP
PC ← Rn16
JSR @aa:16
– SP–2 → SP
4
––––––8
PC → @SP
PC ← aa:16
JSR @@aa:8
SP–2 → SP
2
––––––8
PC → @SP
PC ← @aa:8
RTS
– PC ← @SP
2––––––8
SP+2 → SP
RTE
– CCR ← @SP
2 ◊ ◊ ◊ ◊ ◊ ◊ 10
SP+2 → SP
PC ← @SP
SP+2 → SP
SLEEP
– Transit to sleep mode.
2––––––2
LDC #xx:8,CCR
B #xx:8 → CCR
2
◊◊◊◊◊◊2
LDC Rs,CCR
B Rs8 → CCR
2
◊◊◊◊◊◊2
STC CCR,Rd
B CCR → Rd8
2
––––––2
ANDC #xx:8,CCR
B CCR∧#xx:8 → CCR
2
◊◊◊◊◊◊2
ORC #xx:8,CCR
B CCR∨#xx:8 → CCR
2
◊◊◊◊◊◊2
XORC #xx:8,CCR
B CCR⊕#xx:8 → CCR
2
◊◊◊◊◊◊2
NOP
– PC ← PC+2
2––––––2
Notes: The number of states is the number of states required for execution when the instruction and its
operands are located in on-chip memory.
x Set to “1” when there is a carry or borrow from bit 11; otherwise cleared to “0.”
≠ If the result is zero, the previous value of the flag is retained; otherwise the flag is cleared to “0.”
z Set to “1” if decimal adjustment produces a carry; otherwise cleared to “0.”
{ The number of states required for execution is 4n+8 (n = value of R4L)
∞ These instructions are not supported by the H8/338 Series.
± Set to “1” if the divisor is negative; otherwise cleared to “0.”
≤ Cleared to “0” if the divisor is not zero; undetermined when the divisor is zero.
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